1. Field of Invention
The present invention relates to a power factor correction circuit, a control circuit for a power factor correction circuit, and a method for driving a load circuit through power factor correction; in particular, the present invention relates to such circuits and method that can keep an output current under an upper limit by a chop control method.
2. Description of Related Art
FIG. 1 shows an LED (light emitting diode) driver circuit disclosed in US 2011/0037414, which supplies power with corrected power factor to an LED circuit. The driver circuit includes a flyback power factor correction (PFC) converter 301, a harmonic filter 303 and a control circuit 305. The flyback PFC converter 301 operates according to a pulse width modulation (PWM) signal, and it converts AC power to a pulse current. The harmonic filter 303 is coupled to the flyback PFC converter 301 and the LED circuit to receive the pulse current and filter its high frequency part. The control circuit 305 is coupled to the flyback PFC converter 301 and the harmonic filter 303, for generating a PWM signal according to the AC power and the pulse current, and reducing a peak-to-average ratio (PAR) of the pulse current. Because this arrangement reduces the current PAR, it does not require using an electrolytic capacitor with high capacitance, thus reducing cost and extending the life time of LEDs. However, this prior art has a drawback that it requires complicated control.
FIG. 2A shows prior art waveforms of an inductor current 71, a current peak envelope 72, and an average current 73 at a primary side of a prior art PFC converter. The voltage waveform (not shown) is in phase with the current peak. Because the current PAR is large, an electrolytic capacitor with very large capacitance is required.
FIG. 2B shows a PFC converter disclosed in US 2010/0014326. It has a harmonic regulation unit which can generate an inductor current containing third harmonic. As the third harmonic is added, the waveforms of the inductor current 74, a current peak envelope 75 and an average current average 76 are as shown in the figure, wherein the current PAR is reduced so it does not require using an electrolytic capacitor with large capacitance. However, this prior art has a drawback that the voltage peak deviates from the current peak, so it has a poor power factor.
To overcome the drawbacks of the above prior art, the present invention proposes a power factor correction circuit, a control circuit for a power factor correction circuit, and a method for driving a load circuit through power factor correction, which can reduce output voltage ripples and extend the life time of LEDs, with simple circuitry.